.TITLE "Decryption Rom O.S." .6502 ; MARIAOS MARIA DATA LOCATION DEFINITIONS ; NOTE THE FOLLOWING WIERD THINGS ABOUT THE RAM: ; 000-03F <=> 0100-013F ; 080-0FF <=> 0180-01FF ; 040-0FF <=> 02040-020FF ; 0140-01FF <=> 02140-021FF ; TIA REGISTERS INPTCTRL = $01 ;INPUT CONTROL INPT4 = $0C ;BITS 7 PLAYER 0 BUTTON INPT5 = $0D ;BITS 7 PLAYER 1 BUTTON AUDC0 = $15 ;BITS 3210 AUDIO CONTROL 0 AUDC1 = $16 ;BITS 3210 AUDIO CONTROL 1 AUDF0 = $17 ;BITS 43210 AUDIO FREQUENCY 0 AUDF1 = $18 ;BITS 43210 AUDIO FREQUENCY 1 AUDV0 = $19 ;BITS 3210 AUDIO VOLUME 0 AUDV1 = $1A ;BITS 3210 AUDIO VOLUME 1 VSYNC = $00 ;BIT 1 VERTICAL SYNC SET-CLR VBLANK = $01 ;BIT 1 VERTICAL BLANK SET-CLR TWSYNC = $02 ;STROBE WAIT FOR HORIZ BLANK RSYNC = $03 ;STROBE RESET HORIZ SYNC COUNTER COLUP0 = $06 ;BITS 7654321 COLOR(4)-LUM(3) PLAYER 0 COLUP1 = $07 ;BITS 7654321 COLOR(4)-LUM(3) PLAYER 1 COLUPF = $08 ;BITS 7654321 COLOR(4)-LUM(3) PLAYFIELD COLUBK = $09 ;BITS 7654321 COLOR(4)-LUM(3) BACKGROUND PF2 = $0F ;BITS ALL PLAYFIELD REG BYTE 2 RESP0 = $10 ;STROBE RESET PLAYER 0 RESP1 = $11 ;STROBE RESET PLAYER 1 GRP0 = $1B ;BITS ALL GRAPHICS FOR PLAYER 0 GRP1 = $1C ;BITS ALL GRAPHICS FOR PLAYER 1 CXCLR = $2C ;STROBE CLEAR ALL COLLISION LATCHES CXP0FB = $32 CXP1FB = $33 ; MARIA REGISTERS BACKGRND = $20 ;BACKGROUND COLOR P0C1 = $21 ;PALETTE 0, COLOR 1 P0C2 = $22 ;PALETTE 0, COLOR 2 P0C3 = $23 ;PALETTE 0, COLOR 3 WSYNC = $24 ;FAST MARIA WSYNC STROBE WO P1C1 = $25 ;PALETTE 1, COLOR 1 P1C2 = $26 ;PALETTE 1, COLOR 2 P1C3 = $27 ;PALETTE 1, COLOR 3 MSTAT = $28 ;BIT 6 IN VBLANK, BIT ? IN DISPLAY RO P2C1 = $29 ;PALETTE 2, COLOR 1 P2C2 = $2A ;PALETTE 2, COLOR 2 P2C3 = $2B ;PALETTE 2, COLOR 3 DPPH = $2C ;DISPLAY LIST POINTER HIGH WO P3C1 = $2D ;PALETTE 3, COLOR 1 P3C2 = $2E ;PALETTE 3, COLOR 2 P3C3 = $2F ;PALETTE 3, COLOR 3 DPPL = $30 ;DISPLAY LIST POINTER LOW WO P4C1 = $31 ;PALETTE 4, COLOR 1 P4C2 = $32 ;PALETTE 4, COLOR 2 P4C3 = $33 ;PALETTE 4, COLOR 3 CHARBASE = $34 ;CHARACTER MODE HIGH POINTER WO P5C1 = $35 ;PALETTE 5, COLOR 1 P5C2 = $36 ;PALETTE 5, COLOR 2 P5C3 = $37 ;PALETTE 5, COLOR 3 OFFSET = $38 ;NOT USED ****** P6C1 = $39 ;PALETTE 6, COLOR 1 P6C2 = $3A ;PALETTE 6, COLOR 2 P6C3 = $3B ;PALETTE 6, COLOR 3 CTRL = $3C ;BIT 7 CHARACTER WIDTH, BIT 6 BCNT WO P7C1 = $3D ;PALETTE 7, COLOR 1 P7C2 = $3E ;PALETTE 7, COLOR 2 P7C3 = $3F ;PALETTE 7, COLOR 3 ; FREE RAM - 040-0FF ; ALIASED RAM - 0100-013F ; STACK - 0140-01FF ; 6532 TIMERS AND PORTS SWCHA = $280 ;JOYSTICKS ; BIT 7 PLAYER 0 EAST IF CLEAR ; BIT 6 WEST ; BIT 5 SOUTH ; BIT 4 NORTH ; BIT 3 PLAYER 1 EAST IF CLEAR ; BIT 2 WEST ; BIT 1 SOUTH ; BIT 0 NORTH SWCHB = $282 ;CONSOLE SWITCHES ; BIT 7 PLAYER 1 DIFFICULTY A IF SET, B IF CLEAR ; BIT 6 PLAYER 2 DIFFICULTY A IF SET, B IF CLEAR ; BIT 3 BLACK AND WHITE VS COLOR - COLOR WHEN SET ; BIT 1 GAME SELECT - CLEAR WHEN PRESSED ; BIT 0 GAME RESET - CLEAR WHEN PRESSED CTLSWA = $281 CTLSWB = $283 INTIM = $284 ;INTERVAL TIMER IN TIM8T = $295 ;TIMER 8T WRITE OUT TIM64T = $296 ;TIMER 64T WRITE OUT TIM64TI = $29E ;INTERRUPT TIMER 64T ; ENDEF.S ENCRYPTION SYMBOL DEFINITIONS ; ADDRESS DEFINITIONS ; PAGE 0 - 0080-00FF ($40-07F TAKEN BY A REGISTER) TEST0 = $C0 ;TEST DATA FOR CPU TEST TEST1 = $C1 TESTW0 = $C2 ;2 BYTES TESTW1 = $C4 ;2 BYTES TEMP0 = $D0 ;SCRATCH DATA FOR PROGRAM USE TEMP1 = $D1 ;MORE SCRATCH DATA TEMP2 = $D2 ;MORE SCRATCH DATA TEMP3 = $D3 ;MORE SCRATCH DATA TEMP4 = $D4 ;MORE SCRATCH DATA TEMP5 = $D5 ;MORE SCRATCH DATA STARTA = $E0 ;WHERE ACCUMULATOR STARTS OFFSETA = $E1 ;OFFSET INTO ACCUMULATOR OFFSETR = $E2 ;OFFSET INTO A REGISTER SIZEA = $E3 ;SIZE OF ACCUMULATOR SIZER0 = $E4 ;SIZE OF REGISTER 0 SIZER1 = $E5 ;SIZE OF REGISTER 1 SIZER3 = $E6 ;SIZE OF REGISTER 3 SIZER5 = $E7 ;SIZE OF REGISTER 5 CARTBOTM = $EE ;BOTTOM OF CARTRIDGE ADDRESS FUJICOLR = $EF ;STARTING COLOR FOR FUJI-A KNLSTATE = $F0 ;HOW MANY MORE ITERATIONS TILL KERNEL KNLCOUNT = $F1 ;TIMER FOR CHANGING FUJI COLOR KNLTIME = $F2 ;TIME THAT COUNT IS GOOD FOR KNLOFSET = $F3 ;HOW STAGGERED THE FUJI COLOR IS DLIADDR = $F4 ;SAME ADDRESS AS IN PACK-IN ; HIGH RAM - 01800-027FF ACC = $1800 ;256 BYTE ACCUMULATOR REG0 = $1900 ;128 BYTE REGISTER REG2 = $1A00 ;128 BYTE REGISTER REG4 = $1B00 ;128 BYTE REGISTER REG6 = $1C00 ;128 BYTE REGISTER REG8 = $1D00 ;128 BYTE REGISTER REG10 = $1E00 ;128 BYTE REGISTER REG12 = $1F00 ;128 BYTE REGISTER RAMGRAPH = $1984 ;GRAPHICS IN RAM, 019XX-$1EXX RAMDLL = $1F84 ;DLL REG1 = $2000 ;128 BYTE REGISTER ; ***** HOLE FROM 02040 TO 020FF - SHADOWED IN PAGE 0 ***** REG14 = $2100 ;128 BYTE REGISTER (OVERLAPS PART OF S) ; ***** HOLE FROM 02140 TO 021FF SHADOWED IN PAGE 1 ***** ; DISPLAY LIST RAM RAMDLIST = $2200 ;RAM FOR DLISTS FOR WORDS AND FUJI-A ; MEMORY LOCATIONS FOR CODE, BEFORE AND AFTER MOVING ROMCD = $F400 ;WHERE DROPPED CODE LIVES ROMCD2 = $F880 ;WHERE NON-DROPPED CODE IS RAMCODE = $2300 ;AREA RESERVED FOR CODE CODEDIF = ROMCD-RAMCODE ;DIFFERENCE BETWEEN OLD AND NEW ADDRESS ; ENCRYPTION CONSTANTS STACKPTR = $FF ;WHERE STACK IS ON PAGE 1 REGION = $FE ;MASK FOR COUNTRY RANDBYTE = $04 ;RANDOM BYTE IN CHECKSUM ;NTGAME = $D804 ;INTERNAL GAME ROM START LOCATION ;NTDLI = $D800 ;INTERNAL GAME DLI HANDLER INTDLI = $F000 ;OUR DLI ; SCAFFOLD.S ; THIS DOES THE DISPATCHING WHENEVER THE PACK-IN ISN'T AROUND .org INTDLI PHA JMP (DLIADDR) ; CART.S ROUTINES DEALING WITH CHECKING THE CARTRIDGE OUT .org ROMCD NOCART: JMP LOCK2600-CODEDIF ;NO INTERNAL CART BADCART: JMP LOCK2600-CODEDIF ;CART DOES NOT CHECK, DO 2600 MODE CARTTEST: LDA #$16 ;TURN EXTERNAL CART ON STA INPTCTRL LDY #$FF LDX #$7F ;SEE IF A CART PLUGGED IN CTSTLOOP: LDA $FE00,X CMP $FD80,Y BNE NOCART DEY DEX BPL CTSTLOOP ;X LEFT = FF, Y LEFT = 7F LDA $FFFC ;SEE IF START AT FFFF AND $FFFD CMP #$FF BEQ NOCART ;ALL LINES DRAWN HIGH, NO CART LDA $FFFC ;SEE IF START AT 0000 ORA $FFFD BEQ NOCART ;ALL LINES DRAWN LOW, NO CART LDA $FFF8 ;CHECK FOR REGION VERIFICATION ORA #REGION CMP #$FF BNE BADCART LDA $FFF8 ;TOP 4 BITS OF FFF8 SHOULD BE 0F0 EOR #$F0 AND #$F0 BNE BADCART LDA $FFF9 ;SEE IF MARIA SIGNATURE EXISTS AND #$0B ;0X7 OR 0X3 VALID CMP #$03 BNE BADCART LDA $FFF9 ;GET BOTTOM OF CART ADDRESS AND #$F0 STA CARTBOTM * .include "decrypt.s" ; VECTOR.S WE HAVE DETERMINED VALIDITY, VECTOR TO CART IN 2600 OR ; 3600 MODE SETMARIA: LDX #$16 ;PUT CART IN 3600 MODE, CART ON STX INPTCTRL TXS SED JMP ($FFFC) ;VECTOR INTO THE CART IN 3600 MODE LOCK2600: LDA #$02 STA INPTCTRL ;TURN SECURITY ROM ON LDX #$7F ;LOCK CART IN 2600 MODE, CART ON L2LOOP: LDA SYNC,X ;MOVE CODE TO RAM STA $480,X ;MOVE INTO 6532 RAM DEX BPL L2LOOP JMP $480 ;AND EXECUTE OUT OF RAM ; First zero out TIA without doing a TWSYNC. This must be done in a loop that ; counts up so that graphics are turned off before the collision registers are ; cleared. RSYNC should turn case C into a case A. Note also that the stores ; of zero puts the system in TIA space but does not lock it there. This code ; must all run out of 6532 RAM since the memory map will change as we change ; mode. The 6532 RAM exists in all memory maps. SYNC: LDA #0 TAX STA VBLANK ZEROLP: STA RSYNC,X INX CPX #(CXCLR-RSYNC+1) BNE ZEROLP ; Test now for a possible E case. In some E cases, TWSYNCs do not work properly ; and this must be detected. In an E case failure, the LDA is prefetched and ; the 04 following it is skipped over and NOP ($EA) is loaded into A causing ; the branch on minus to be taken. If this happens the E case can now be ; corrected. NOTE: All E cases do not get trapped here and must be handled ; latter by collisions. STA TWSYNC LDA #4 NOP BMI ECASE ; Position player 0 on the left side of the screen and player 1 on the right ; side of the screen so that they will overlap (or not overlap as the case may ; be) playfield 2 that has a copy on both sides of the screen. Resets occur at ; the 38th and 65th cycle. LDX #4 STALL4: DEX ;Stall loop BPL STALL4 TXS ;Set the stack to 0FF for stall JSRs STA RESP0+$100 ;38th cylce JSR DUMMY+1-SYNC+$480 ;12 cycle stall JSR DUMMY+1-SYNC+$480 ;Ditto STA RESP1 ;65th cycle ; Turn on graphics to cause the collisions STA GRP0 ;68th cycle STA GRP1 ;71st cycle STA PF2 ;74th cycle ; Stall an entire scan line to allow collisions to take place. The E case test ; should follow all TWSYNCs to be safe. NOP ;76th cycle STA TWSYNC ;3rd cycle LDA #0 NOP BMI ECASE ; Test now for a collision between player 1 and playfield. If there is no ; collision, we must shift the clock once. If there is a collision, we must ; do further testing. BIT CXP1FB-$30 BMI NOCOL1 ; This section shifts the clock once. Storing a 2 switches the system into ; MARIA MODe and the following store to 0FXXX causes a clock speed-up for one ; cycle and thus shifts the clock once. ECASE: LDA #2 STA COLUBK ;changes to MARIA MODe STA $F112 BNE DONE ;JMP ; Test now for a collision between player 0 and playfield. If there is no ; collision, we must shift the clock twice. If there is a collision, we must ; do further testing. NOCOL1: BIT CXP0FB-$30 BMI NOCOL0 ; This section shifts the clock twice. Storing a 2 switches the system into ; MARIA MODe and the following stores to 0FXXX causes two clock speed-ups for ; one cycle and thus shifts the clock twice. LDA #2 STA COLUP0 ;changes to MARIA MODe STA $F118 DUMMY: STA $F460 ;Note that the 060 is a RTS BNE DONE ; If we've fotten to this point the only possible failure left is an E case that ; was not detected by the TWSYNC trap. Test for this by clearing the collision ; registers, shifting the graphics for player 0 to the left one pixel by ; changing GRP0 from a 4 to an 8, and then retesting for a collision. If there ; is still a collision between player 0 and the playfield, we have an E case, ; otherwise we are done. Be careful not to test for collisions until after they ; occur (about the 40th cycle). NOCOL0: STA CXCLR ;21st cycle LDA #8 ;23rd cycle - one pixel to the left STA GRP0 ;26th cycle JSR DUMMY+1-SYNC+$480 ;12 cycle stall NOP ;40th cycle - just to be safe BIT CXP0FB-$30 ;43rd cycle BMI ECASE ; We are now synced and should lock ourselves into TIA mopde with the external ; cart enabled and jump to the reset vector. Thanks for stopping by... DONE: LDA #$FD STA COLUPF ;Change MODes to TIA with EXT and lock. JMP ($FFFC) NROM: NOP ;END OF FIRST PART OF ROM ; TESTS.S RAM AND CPU TESTS - IF EITHER ARE BAD, DECRYPTION WILL FAIL, ; THUS, THESE MUST BE TESTED FIRST ; ***** NOTE: ***** THE FOLLOWING INSTRUCTIONS ARE NOT TESTED BY THE CPU TEST, ; AND THUS SHOULD NOT BE USED IN THE VALIDATION/DECRYPTION CODE: ; BRK, RTI, PLP, PHP, CLV, SEV, BVC, BVS, CLD, SED, BIT, SEI, CLI ; TEST FAILURE MODES BADCPU = $00 ;CPU ERROR BAD16A = $01 ;ERROR IN RAM 02000-$27FF BAD16B = $02 ;ERROR IN RAM 01800-$1FFF BADRAM = $03 ;CAN'T GET TO ANY OF THE RAM BADMARIA = $04 ;MARIA SHADOWING NOT WORKING BADVALID = $05 ;BAD VALIDATION OR DECRYPTION .org ROMCD2 FATAL0: LDA #$1D ;THERE HAS BEEN SOMETHING BAD FOUND STA INPTCTRL ;LOCK IN 2600 MODE, TEST CART WILL FIND MAIN: SEI ;INITIALIZE CLD LDA #$02 ;PUT BASE UNIT INTO MARIA ENABLE STA INPTCTRL LDA #ENDDLI >> 8 ;WESTBERG SUX STA DLIADDR+1 ;WESTBERG SUX LDA #$ff & ENDDLI ;WESTBERG SUX STA DLIADDR ;WESTBERG SUX LDA #$7F STA CTRL ;TURN OFF DMA LDA #$00 STA BACKGRND ;BACKGROUND COLOR TO BLACK ; ***** RAM TESTS ***** ; SIMPLE RAM TEST TO CHECK PAGES 02000 AND 02100 IS DONE FIRST TO GIVE US ; RAM TO TEST OUT THE CPU (SHADOWED TO PAGES 00000 AND 00100). AFTER ; THE CPU TEST, A FULL RAM TEST IS DONE. ; EARLY RAM TEST, JUST CHECK OUT OUR TWO PAGES USING MINIMAL INSTRUCTIONS RAMCHECK: LDX #$05 ;TEST OUT 4 PATTERNS OF RAM RCAGAIN: LDA RAMPAT,X LDY #$00 RCLOOP: STA $2000,Y ;CHECK ZERO PAGE CMP $2000,Y BNE CHKRAMB STA $2100,Y ;CHECK PAGE 1 CMP $2100,Y BNE CHKRAMB DEY BNE RCLOOP DEX BPL RCAGAIN ; SEE IF MARIA SHADOWING WORKS LDA #$43 ;A SIMPLE TEST TO SEE IF SHADOWING WORK STA $2080 CMP $0080 BNE MARIAERR STA $2180 CMP $0180 BNE MARIAERR JMP CPUTEST ;IF SHADOWING AND RAM WORKS, CHECK CPU ; RAM FAILURE ROUTINES MARIAERR: LDY #BADMARIA ;MARIA SHADOWING BAD JMP FATAL0 CHKRAMB: STA $1800 ;RAMA HAS FAILED IN SIMPLE TEST, CHECK CMP $1800 ; TO SEE IF ANY RAM WORKS BNE RAMERR RAMAERR: LDY #BAD16A ;BAD RAM CHIP - 02000-$27FF JMP FATAL0 RAMBERR: LDY #BAD16B ;BAD RAM CHIP - 01800-$1FFF JMP FATAL0 RAMERR: LDY #BADRAM ;ALL RAM BAD - COULD BE ANOTHER PROBLEM JMP FATAL0 ; A FULL RAM TEST, TO BE DONE AFTER THE CPU TEST SUCEEDS RAMTEST: LDA #$00 ;SET UP STATE TO MARCH THROUGH RAM STA $F0 ;(F0) = 02000 STA $F2 ;(F2) = 01800 LDY #$07 ;NUMBER OF PAGES TO CHECK STY $F4 RTPAGE: LDA RAMAPAGE,Y ;SET UP RAM A PAGE TO CHECK STA $F1 LDA RAMBPAGE,Y ;SET UP RAM B PAGE TO CHECK STA $F3 LDX #$05 ;NUMBER OF RAM PATTERNS TO CHECK RTPAT: LDA RAMPAT,X ;GET RAM PATTERN LDY #$00 ;INITIALIZE INDEX RTLOOP: STA ($F0),Y ;CHECK RAM A CMP ($F0),Y BNE RAMAERR STA ($F2),Y ;CHECK RAM B CMP ($F2),Y BNE RAMBERR DEY BNE RTLOOP DEX BPL RTPAT DEC $F4 ;ONE LESS PAGE LDY $F4 BPL RTPAGE JMP STARTVND ;START THE VALIDATION AND DECRYPTION RAMPAT: dc.b $00,$FF,$55,$AA,$69,$0F ;PATTERNS FOR RAM TEST RAMAPAGE: dc.b $22,$23,$24,$25,$26,$27,$22,$23 ;HI BYTES OF RAM A PAGES RAMBPAGE: dc.b $18,$19,$1A,$1B,$1C,$1D,$1E,$1F ;HI BYTES OF RAM B PAGES ; ***** CPU TESTS ***** IRQINT: ;IF WE GET AN IRQ, IT IS A CPU ERROR CPERR: LDY #BADCPU ;CPU ERROR JMP FATAL0 ; CPU TEST, METHODICALLY CHECK ALL INSTRUCTIONS, ADDRESSING MODES, AND STATUS ; BITS THAT THE DECRYPTION WILL BE USING CPUTEST: LDA #$AA ;FIRST, TEST OUT LDA AND BRANCHING BEQ CPERR ;CHECK BEQ FAIL BPL CPERR ;CHECK BPL FAIL BMI CTA ;CHECK BMI SUCCEED JMP CPERR CTA: BNE CTB ;CHECK BNE SUCCEED JMP CPERR CTB: STA $AA ;STORE IT AWAY, 0AA = AA CMP $AA ;SEE IF IT ADDRESSES AND COMPARES BNE CPERR LDA #$00 ;TEST ALTERNATE POLARITY BNE CPERR ;CHECK BNE FAIL BMI CPERR ;CHECK BMI FAIL BPL CTC ;CHECK BPL SUCCEED JMP CPERR CTC: BEQ CTD ;CHECK BEQ SUCCEED JMP CPERR CTD: CMP #$00 BNE CPERR ;CHECK CMP EQ BCC CPERR ;CHECK BCC FAIL BCS CTE ;CHECK BCS SUCCEED JMP CPERR CTE: CMP #$01 BCS CPERR ;CHECK BCS FAIL BCC CTF ;CHECK BCC SUCCEED JMP CPERR CTF: LDX #$55 ;TEST X AND Y, LOADS, STORES, AND COMP CPX #$56 ;CHECK CPX BEQ CPERR STX $1AA ;CHECK STX - 01AA = 55 CPX $1AA ;CHECK CPX BNE CPERR LDY $AA ;CHECK LDY, - Y = AA CPY #$AB BEQ CPERR STY $155 ;CHECK STY - 0155 = AA CPY $155 ;CHECK CPY BNE CPERR DEX ;CHECK TRANSFER DATA PATHS AND STACK TXS ;TO POINT TO 0155, S MUST BE 54 INX PLA ;S HAS 55, A = 0155 (= AA) CMP #$AA ;TEST TXS AND PLA BNE CPERR0 TXA ;A = 55 PHA ;0155 = 55 CPX $155 ;TEST TXA AND PHA BNE CPERR0 TYA ;A = AA CMP #$AA ;TEST TYA BNE CPERR0 TAX ;X = AA LDA $100,X ;NORM,X - A = 01AA (= 55) TAY ;Y = 55 CPY #$55 ;TEST NORM,X, TAX, TAY BNE CPERR0 ;TEST ADDRESSING MODES (NORM,X DONE) LDA $00,X ;ZP,X - A = 0AA (= AA) CMP $AA ;ZP, TEST ZP AND ZP,X BNE CPERR0 CMP #$AA ;TEST ZP AND ZP,X BNE CPERR0 EOR #$FF ;A = 55 STA $00,Y ;ZP,Y - 055 = 55 CMP $55 BNE CPERR0 CMP $100,Y ;NORM,Y ($155) BNE CPERR0 CMP $20AB,X ;NORM,Y W/WRAP ($155) BNE CPERR0 LDA #$20 ;SET UP ADDR, TEST (IND,X), (IND),Y STA $F1 LDA #$CC STA $F0 ;($F0) = 020CC (WHICH IS 0CC) STA ($F0-$AA,X) ;(IND,X) - 0CC = CC CMP $CC BNE CPERR0 STA ($F0),Y ;(IND),Y - 02121 = CC CMP $2121 BNE CPERR0 LDA #$ff & CTCONT ;TEST (IND), ONLY JMP USES STA $F0 LDA #CTCONT >> 8 STA $F1 JMP ($F0) ;(IND) JMP CPERR0 CPERR0: JMP CPERR ;ANOTHER CPERR CTCONT: LDA #$55 ;TEST ADDER CLC ADC #$55 ;55 + 55 = AA NOP ;NOP, MAKE SURE IT DOESN'T ALTER STATE BCS CPERR0 BPL CPERR0 BEQ CPERR0 CMP #$AA BNE CPERR0 ; SEC ADC #$55 ;AA + 55 + C = 0 + C NOP ;NOP, MAKE SURE IT DOESN'T ALTER STATE BCC CPERR0 BMI CPERR0 BNE CPERR0 ; SEC ;TEST SUBTRACT SBC #$55 ;0 - 55 = AB - C' BCS CPERR0 BPL CPERR0 BEQ CPERR0 CMP #$AB BNE CPERR0 CLC SBC #$AA ;AB - AA + C' = 0 BCC CPERR0 BMI CPERR0 BNE CPERR0 LDA #$FF ;TEST OUT INCREMENTS AND DECREMENTS TAX ;X = FF INX ;TEST INX - X = 0 BNE CPERR1 DEX ;TEST DEX - X = FF BEQ CPERR1 BPL CPERR1 CPX #$FF BNE CPERR1 TAY ;Y = FF INY ;TEST INY - Y = 0 BNE CPERR1 DEY ;TEST DEY - Y = FF BEQ CPERR1 INY ;Y = 0 BNE CPERR1 STA $F0 ;0F0 = FF INC $F0 ;TEST INC - 0F0 = 0 BNE CPERR1 CPY $F0 BNE CPERR1 DEC $F0 ;TEST DEC - 0F0 - FF BEQ CPERR1 CMP $F0 BNE CPERR1 LDA #$AA ;TEST SHIFTS AND ROTATES - 10101010 CLC ;C = 0 ROL ;01010100, C=1 ROL ;10101001, C=0 ROL ;01010010, C=1 CMP #$52 ;01010010 BNE CPERR1 ; SEC ;C = 1 ROR ;10101001, C=0 ROR ;01010100, C=1 ROR ;10101010, C=0 CMP #$AA ;10101010 BEQ CTSHIFT CPERR1: JMP CPERR ;ANOTHER CPERR CTSHIFT: ASL ;01010100, C=1 BCC CPERR1 ASL ;10101000, C=0 BCS CPERR1 ASL ;01010000, C=1 CMP #$50 BNE CPERR1 EOR #$05 ;01010101 LSR ;00101010, C=1 BCC CPERR1 LSR ;00010101, C=0 BCS CPERR1 LSR ;00001010, C=1 CMP #$0A BNE CPERR1 LDA #$55 ;TEST LOGICAL OPERATIONS ORA #$1B ;TEST OR - A = 5F CMP #$5F BNE CPERR1 AND #$55 ;A = 55 AND #$1B ;TEST AND - A = 11 CMP #$11 BNE CPERR1 ORA #$55 ;A = 55 EOR #$1B ;TEST EOR CMP #$4E BNE CPERR1 JSR CTJSR ;GRAND FINALE, TEST JSR, S = 55 CTJSRRET: JMP CPERR1 ;NO GOOD IF WE DIDN'T JSR CTJSR: TSX ;SEE WHERE STACK IS CPX #$52 BNE CPERR1 PLA ;GET RETURN ADDRESS CMP #$ff & (CTJSRRET-1) BNE CPERR1 PLA CMP #(CTJSRRET-1)>>8 BNE CPERR1 LDA #(RAMTEST-1)>>8 ;PUT START OF CODE AS RETURN ADDRESS PHA LDA #$ff & (RAMTEST-1) PHA RTS ;DO IT JMP CPERR1 ;AGAIN, NO GOOD IF WE DIDN'T DO IT ; KERNEL.S DLI ROUTINES FOR THE SECURITY ROM ; OUR DLI HANDLER DLI: TXA ;STACK REGISTERS, A ALREADY STACKED PHA LDA #$43 STA CTRL LDX #$0F LDA FUJICOLR STA P0C2 ;INITIALIZE COLOR BIT KNLOFSET ;FIGURE OUT STAGGERING BVC DFJMP1 BPL DFJMP0 DFLOOP: STA WSYNC ;CHANGE COLOR ONCE PER THREE LINES DFJMP0: STA WSYNC ;SECOND LINE DFJMP1: STA WSYNC ;THIRD LINE SEC ;GET A NEW COLOR FOR THE NEXT LINE SBC #$10 CMP #$10 BCS DFNEXT SBC #$0F DFNEXT: STA P0C2 ;CHANGE COLORS DEX BPL DFLOOP DLIATARI: LDX #$40 ;SET UP CTRL FOR ATARI WORDS STX CTRL AND #$F0 ORA #$0E STA P1C3 LDA FUJICOLR AND #$F0 ORA #$06 STA P1C1 AND #$F0 CLC ;ROTATE BAR COLOR ADC #$40 BCC DLAJMP ADC #$0F DLAJMP: ORA #$03 STA P1C2 DEC KNLCOUNT ;SEE IF TIME FOR A COLOR CHANGE YET BPL DLIDONE LDA KNLOFSET ;SEE IF TIME TO STAGGER, OR CHANGE CLR ADC #$60 BCC DLIOFSET LDA FUJICOLR ;ROTATE FUJI COLOR CLC ADC #$10 BCC DLJMP0 ADC #$0F DLJMP0: STA FUJICOLR LDA KNLTIME ;RESET TIMER STA KNLCOUNT LDA #$00 DLIOFSET: STA KNLOFSET ;UPDATE KERNAL STAGGERING CONTROL DLIDONE: LDA #$02 ;NOTE THAT WE HAVE DONE KERNEL STA KNLSTATE PLA ;UNSTACK REGISTERS TAX ENDDLI: PLA RTI INFLOOP: JMP INFLOOP ; MAIN.S MAIN ROUTINE FOR DECRYPTION CODE ; CALLED FROM ROUTINES IN TESTS.S STARTVND: LDX #STACKPTR TXS ;SET STACK POINTER LDA #0 ;ZERO THE TIA REGISTERS OUT TAX TIA0LOOP: STA 1,X INX CPX #$2C BNE TIA0LOOP LDA #$02 ;BACK INTO MARIA MODE STA INPTCTRL ; THIS ROUTINE DROPS OUR CODE INTO RAM DROPRAM: LDX #$00 ;X = 0, DROP CODE AND GRAPHICS INTO RAM STX BACKGRND ;PUT BACKGROUND TO BLACK DRLOOP: LDA ROMCD+$000,X ;DROP CODE STA RAMCODE+$000,X LDA ROMCD+$100,X STA RAMCODE+$100,X LDA ROMCD+$200,X STA RAMCODE+$200,X LDA ROMCD+$300,X STA RAMCODE+$300,X LDA ROMCD+$400,X STA RAMCODE+$400,X LDA ROMDLIST,X ;DROP DISPLAY LISTS STA RAMDLIST,X CPX #$00 BMI DRLJMP0 LDA ROMDLL,X ;DROP DLL STA RAMDLL,X LDA RMGRP6,X ;DROP GRAPHICS INTO HALF PAGE STA RAMGRAPH+$000,X LDA RMGRP5,X STA RAMGRAPH+$100,X LDA RMGRP4,X STA RAMGRAPH+$200,X LDA RMGRP3,X STA RAMGRAPH+$300,X LDA RMGRP2,X STA RAMGRAPH+$400,X LDA RMGRP1,X STA RAMGRAPH+$500,X DRLJMP0: DEX BNE DRLOOP JMP (CARTTEST-CODEDIF) ;START THE DECRYPTION ; TURN THE GRAPHICS ON GRPON: LDA $FFF9 ;SEE IF DISPLAY IS TO BE STARTED AND #$04 BEQ STRTCRPT GRPON2: LDA #$03 ;SET UP KERNEL STA KNLCOUNT STA KNLTIME LDA #$49 ;SET COLORS STA FUJICOLR LDA #$66 STA P1C1 LDA #$56 STA P1C2 LDA #$2E STA P1C3 LDA #$ff & DLI ;SET DLI STA DLIADDR LDA #DLI >> 8 STA DLIADDR+1 SCRNOF: BIT MSTAT ;IS VBLANK ENDED YET? BMI SCRNOF SCRNON: BIT MSTAT ;IS VBLANK STARTED YET? BPL SCRNON LDA #$ff & RAMDLL STA DPPL ;SET DPPL AND DPPH TO DLLIST LDA #RAMDLL >> 8 STA DPPH LDA #$43 STA CTRL ;TURN GRAPHICS ON STRTCRPT: RTS ; DISPLAY LISTS ROMDLIST: .dc.b $ff & (RAMGRAPH),$1F,RAMGRAPH >> 8,$BB,$00,$00 RDL5BYTE: .dc.b $ff & (RAMGRAPH),$40,RAMGRAPH >> 8,$1F,$BB,$00,$00 RDLFJ1: .dc.b $ff & (RAMGRAPH+RMFUJ1-ROMGRAPH),$1C,RAMGRAPH >> 8,$4A,$00,$00 RDLFJ2: .dc.b $ff & (RAMGRAPH+RMFUJ2-ROMGRAPH),$1C,RAMGRAPH >> 8,$4A,$00,$00 RDLFJ3: .dc.b $ff & (RAMGRAPH+RMFUJ3-ROMGRAPH),$1C,RAMGRAPH >> 8,$48,$00,$00 RDLFJ4: .dc.b $ff & (RAMGRAPH+RMFUJ4-ROMGRAPH),$1B,RAMGRAPH >> 8,$46,$00,$00 RDLFJ5: .dc.b $ff & (RAMGRAPH+RMFUJ5-ROMGRAPH),$19,RAMGRAPH >> 8,$42,$00,$00 RDLFJ6: .dc.b $ff & (RAMGRAPH+RMFUJ6-ROMGRAPH),$17,RAMGRAPH >> 8,$3E,$00,$00 RDLFJ7: .dc.b $ff & (RAMGRAPH+RMFUJ7-ROMGRAPH),$17,RAMGRAPH >> 8,$3E,$00,$00 RDLRC: .dc.b $ff & (RAMGRAPH+ROMSTRIP-RMGRP3),$2C,(RAMGRAPH+$300)>>8,$00 .dc.b $ff & (RAMGRAPH+ROMSTRIP-RMGRP3),$2C,(RAMGRAPH+$300)>>8,$50 .dc.b $00,$00 RDLRCL: .dc.b $ff & (RAMGRAPH+ROMSTRIP-RMGRP3),$2C,(RAMGRAPH+$400)>>8,$00 .dc.b $ff & (RAMGRAPH+ROMSTRIP-RMGRP3),$2C,(RAMGRAPH+$400)>>8,$50 .dc.b $00,$00 RDLN01: .dc.b $ff & (RAMGRAPH+RMLIN1-ROMGRAPH),$2D,(RAMGRAPH+$000)>>8,$28 .dc.b $00,$00 RDLN02: .dc.b $ff & (RAMGRAPH+RMLIN2-ROMGRAPH),$2D,(RAMGRAPH+$000)>>8,$28 .dc.b $00,$00 RDLN03: .dc.b $ff & (RAMGRAPH+RMLIN3-ROMGRAPH),$2D,(RAMGRAPH+$000)>>8,$28 .dc.b $00,$00 RDLN04: .dc.b $ff & (RAMGRAPH+RMLIN4-ROMGRAPH),$2D,(RAMGRAPH+$000)>>8,$28 .dc.b $00,$00 RDLN05: .dc.b $ff & (RAMGRAPH+RMLIN1-ROMGRAPH),$2D,(RAMGRAPH+$100)>>8,$28 .dc.b $00,$00 RDLN06: .dc.b $ff & (RAMGRAPH+RMLIN2-ROMGRAPH),$2D,(RAMGRAPH+$100)>>8,$28 .dc.b $00,$00 RDLN07: .dc.b $ff & (RAMGRAPH+RMLIN3-ROMGRAPH),$2D,(RAMGRAPH+$100)>>8,$28 .dc.b $00,$00 RDLN08: .dc.b $ff & (RAMGRAPH+RMLIN4-ROMGRAPH),$2D,(RAMGRAPH+$100)>>8,$28 .dc.b $00,$00 RDLN09: .dc.b $ff & (RAMGRAPH+RMLIN1-ROMGRAPH),$2D,(RAMGRAPH+$200)>>8,$28 .dc.b $00,$00 RDLN10: .dc.b $ff & (RAMGRAPH+RMLIN2-ROMGRAPH),$2D,(RAMGRAPH+$200)>>8,$28 .dc.b $00,$00 RDLN11: .dc.b $ff & (RAMGRAPH+RMLIN3-ROMGRAPH),$2D,(RAMGRAPH+$200)>>8,$28 .dc.b $00,$00 ; DISPLAY LIST LIST ROMDLL: dc.b $0F,RAMDLIST >> 8,$ff & (RAMDLIST+RDL5BYTE-ROMDLIST) dc.b $0F,RAMDLIST >> 8,$ff & (RAMDLIST+$00) dc.b $0F,RAMDLIST >> 8,$ff & (RAMDLIST+$00) dc.b $0F,RAMDLIST >> 8,$ff & (RAMDLIST+$00) dc.b $03,RAMDLIST >> 8,$ff & (RAMDLIST+$00) dc.b $85,RAMDLIST >> 8,$ff & (RAMDLIST+RDLFJ1-ROMDLIST) ;FUJI-A dc.b $05,RAMDLIST >> 8,$ff & (RAMDLIST+RDLFJ2-ROMDLIST) dc.b $05,RAMDLIST >> 8,$ff & (RAMDLIST+RDLFJ3-ROMDLIST) dc.b $05,RAMDLIST >> 8,$ff & (RAMDLIST+RDLFJ4-ROMDLIST) dc.b $05,RAMDLIST >> 8,$ff & (RAMDLIST+RDLFJ5-ROMDLIST) dc.b $05,RAMDLIST >> 8,$ff & (RAMDLIST+RDLFJ6-ROMDLIST) dc.b $05,RAMDLIST >> 8,$ff & (RAMDLIST+RDLFJ7-ROMDLIST) dc.b $0F,RAMDLIST >> 8,$ff & (RAMDLIST+$00) ;CENTER SPACE dc.b $01,RAMDLIST >> 8,$ff & (RAMDLIST+RDLRC-ROMDLIST) dc.b $00,RAMDLIST >> 8,$ff & (RAMDLIST+RDLN01-ROMDLIST) dc.b $02,RAMDLIST >> 8,$ff & (RAMDLIST+RDLRC-ROMDLIST) dc.b $00,RAMDLIST >> 8,$ff & (RAMDLIST+RDLN02-ROMDLIST) dc.b $02,RAMDLIST >> 8,$ff & (RAMDLIST+RDLRC-ROMDLIST) dc.b $00,RAMDLIST >> 8,$ff & (RAMDLIST+RDLN03-ROMDLIST) dc.b $02,RAMDLIST >> 8,$ff & (RAMDLIST+RDLRC-ROMDLIST) dc.b $00,RAMDLIST >> 8,$ff & (RAMDLIST+RDLN04-ROMDLIST) dc.b $02,RAMDLIST >> 8,$ff & (RAMDLIST+RDLRC-ROMDLIST) dc.b $00,RAMDLIST >> 8,$ff & (RAMDLIST+RDLN05-ROMDLIST) dc.b $02,RAMDLIST >> 8,$ff & (RAMDLIST+RDLRC-ROMDLIST) dc.b $00,RAMDLIST >> 8,$ff & (RAMDLIST+RDLN06-ROMDLIST) dc.b $02,RAMDLIST >> 8,$ff & (RAMDLIST+RDLRC-ROMDLIST) dc.b $00,RAMDLIST >> 8,$ff & (RAMDLIST+RDLN07-ROMDLIST) dc.b $02,RAMDLIST >> 8,$ff & (RAMDLIST+RDLRC-ROMDLIST) dc.b $00,RAMDLIST >> 8,$ff & (RAMDLIST+RDLN08-ROMDLIST) dc.b $02,RAMDLIST >> 8,$ff & (RAMDLIST+RDLRC-ROMDLIST) dc.b $00,RAMDLIST >> 8,$ff & (RAMDLIST+RDLN09-ROMDLIST) dc.b $02,RAMDLIST >> 8,$ff & (RAMDLIST+RDLRC-ROMDLIST) dc.b $00,RAMDLIST >> 8,$ff & (RAMDLIST+RDLN10-ROMDLIST) dc.b $02,RAMDLIST >> 8,$ff & (RAMDLIST+RDLRC-ROMDLIST) dc.b $00,RAMDLIST >> 8,$ff & (RAMDLIST+RDLN11-ROMDLIST) dc.b $01,RAMDLIST >> 8,$ff & (RAMDLIST+RDLRCL-ROMDLIST) dc.b $0F,RAMDLIST >> 8,$ff & (RAMDLIST+$00) ;TRAILING SPACE dc.b $0F,RAMDLIST >> 8,$ff & (RAMDLIST+$00) dc.b $0F,RAMDLIST >> 8,$ff & (RAMDLIST+$00) dc.b $0F,RAMDLIST >> 8,$ff & (RAMDLIST+$00) dc.b $0F,RAMDLIST >> 8,$ff & (RAMDLIST+$00) ; ROM GRAPHICS FOR THE FUJI-A AND WORDS ROMGRAPH: RMGRP6: dc.b $00 ;NULL INFO RMFUJ1: dc.b $7C,$7F,$8F,$80 ;LINE 6 RMFUJ2: dc.b $FC,$7F,$8F,$C0 RMFUJ3: dc.b $1F,$87,$F8,$7E RMFUJ4: dc.b $0F,$E0,$7F,$81,$FC RMFUJ5: dc.b $07,$FF,$80,$7F,$80,$7F,$F8 RMFUJ6: dc.b $1F,$FF,$F0,$00,$7F,$80,$03,$FF,$FE RMFUJ7: dc.b $1F,$00,$00,$00,$7F,$80,$00,$00,$3E RMLIN1: dc.b $00,$00,$0C,$00,$3F,$FF,$FF,$FF ;LINE 1 OF ATARI dc.b $F0,$00,$C0,$00,$00,$3F,$FF,$FF dc.b $00,$03,$FC RMLIN2: dc.b $00,$00,$3F,$00,$3F,$FF,$FF,$FF ;LINE 2 OF ATARI dc.b $F0,$03,$F0,$00,$00,$3F,$FF,$FF dc.b $FC,$03,$FC RMLIN3: dc.b $00,$00,$FF,$C0,$00,$03,$FF,$00 ;LINE 3 OF ATARI dc.b $00,$0F,$FC,$00,$00,$3F,$F0,$03 dc.b $FF,$C3,$FC RMLIN4: dc.b $00,$03,$FF,$F0,$00,$03,$FF,$00 ;LINE 4 OF ATARI dc.b $00,$3F,$FF,$00,$00,$3F,$F0,$00 dc.b $3F,$C3,$FC RMGRP5: dc.b $00 ;NULL INFO dc.b $7C,$7F,$8F,$80 ;LINE 5 dc.b $7C,$7F,$8F,$80 dc.b $1F,$87,$F8,$7E dc.b $0F,$F0,$7F,$83,$FC dc.b $01,$FF,$80,$7F,$80,$7F,$E0 dc.b $1F,$FF,$F8,$00,$7F,$80,$07,$FF,$FE dc.b $1F,$F0,$00,$00,$7F,$80,$00,$03,$FE dc.b $00,$0F,$F3,$FC,$00,$03,$FF,$00 ;LINE 5 OF ATARI dc.b $00,$FF,$3F,$C0,$00,$3F,$F0,$00 dc.b $FF,$C3,$FC dc.b $00,$3F,$C0,$FF,$00,$03,$FF,$00 ;LINE 6 OF ATARI dc.b $03,$FC,$0F,$F0,$00,$3F,$F0,$3F dc.b $FC,$03,$FC dc.b $00,$FF,$00,$3F,$C0,$03,$FF,$00 ;LINE 7 OF ATARI dc.b $0F,$F0,$03,$FC,$00,$3F,$F0,$FF dc.b $C0,$03,$FC dc.b $03,$FF,$FF,$FF,$F0,$03,$FF,$00 ;LINE 8 OF ATARI dc.b $3F,$FF,$FF,$FF,$00,$3F,$F0,$3F dc.b $F0,$03,$FC RMGRP4: dc.b $00 ;NULL INFO dc.b $7C,$7F,$8F,$80 ;LINE 4 dc.b $7C,$7F,$8F,$80 dc.b $1F,$87,$F8,$7E dc.b $07,$F0,$7F,$83,$F8 dc.b $00,$FF,$C0,$7F,$80,$FF,$C0 dc.b $1F,$FF,$FC,$00,$7F,$80,$0F,$FF,$FE dc.b $1F,$FC,$00,$00,$7F,$80,$00,$0F,$FE dc.b $0F,$FF,$FF,$FF,$FC,$03,$FF,$00 ;LINE 9 OF ATARI dc.b $FF,$FF,$FF,$FF,$C0,$3F,$F0,$0F dc.b $FC,$03,$FC dc.b $3F,$F0,$00,$03,$FF,$03,$FF,$03 ;LINE 10 OF ATARI dc.b $FF,$00,$00,$3F,$F0,$3F,$F0,$03 dc.b $FF,$03,$FC dc.b $FF,$C0,$00,$00,$FF,$C3,$FF,$0F ;LINE 11 OF ATARI dc.b $FC,$00,$00,$0F,$FC,$3F,$F0,$00 dc.b $FF,$C3,$FC RMGRP3: dc.b $00 ;NULL INFO dc.b $7C,$7F,$8F,$80 ;LINE 3 dc.b $7C,$7F,$8F,$80 dc.b $0F,$87,$F8,$7C dc.b $07,$F0,$7F,$83,$F8 dc.b $00,$7F,$C0,$7F,$80,$FF,$80 dc.b $1F,$FF,$FE,$00,$7F,$80,$1F,$FF,$FE dc.b $1F,$FF,$00,$00,$7F,$80,$00,$3F,$FE ROMSTRIP: dc.b $55,$55,$55,$55,$55,$55,$55,$55 ;RACING STRIPE dc.b $55,$55,$55,$55,$55,$55,$55,$55 dc.b $55,$55,$55,$55 RMGRP2: dc.b $00 ;NULL INFO dc.b $7C,$7F,$8F,$80 ;LINE 2 dc.b $7C,$7F,$8F,$80 dc.b $0F,$C7,$F8,$FC dc.b $03,$F0,$7F,$83,$F0 dc.b $00,$3F,$E0,$7F,$81,$FF,$00 dc.b $01,$FF,$FE,$00,$7F,$80,$1F,$FF,$E0 dc.b $1F,$FF,$C0,$00,$7F,$80,$00,$FF,$FE dc.b $AA,$AA,$AA,$AA,$AA,$AA,$AA,$AA ;RACING STRIPE dc.b $AA,$AA,$AA,$AA,$AA,$AA,$AA,$AA dc.b $AA,$AA,$AA,$AA RMGRP1: dc.b $00 ;NULL INFO dc.b $7C,$7F,$8F,$80 ;LINE 1 dc.b $7C,$7F,$8F,$80 dc.b $0F,$C7,$F8,$FC dc.b $03,$F8,$7F,$87,$F0 dc.b $00,$1F,$E0,$7F,$81,$FE,$00 dc.b $00,$1F,$FF,$00,$7F,$80,$3F,$FE,$00 dc.b $1F,$FF,$E0,$00,$7F,$80,$01,$FF,$FE dc.b $55,$55,$55,$55,$55,$55,$55,$55 ;RACING STRIPE dc.b $55,$55,$55,$55,$55,$55,$55,$55 dc.b $55,$55,$55,$55 ; NUMBERS.S NUMBERS FOR THE ENCRYPTION ; THIS IS A MASK APPLIED TO THE HI BYTE OF THE CHECKSUM TO MAKE SURE IT IS ; LESS THAN N NMASK = $07 ; N = P*Q, THE BASIC MODULO OF DECRYPTION NLEN = $77 N1: .dc.b $09,$CA,$C9,$C6,$B4,$12,$08,$1B .dc.b $60,$58,$81,$4B,$86,$01,$D8,$BF .dc.b $D9,$25,$A0,$7B,$DC,$32,$79,$84 .dc.b $3B,$7C,$BC,$2F,$E2,$E2,$FA,$8D .dc.b $0A,$00,$3B,$C5,$EC,$AF,$2D,$8A .dc.b $CD,$06,$93,$6A,$A5,$14,$46,$77 .dc.b $C4,$6A,$B2,$53,$36,$EF,$8C,$CE .dc.b $0C,$A2,$68,$71,$D3,$73,$E8,$F7 .dc.b $6D,$06,$B5,$20,$EF,$23,$47,$0C .dc.b $51,$55,$C8,$FE,$F4,$58,$C4,$3F .dc.b $20,$A7,$67,$38,$B0,$76,$E2,$C4 .dc.b $D8,$05,$63,$F8,$3C,$58,$3B,$2D .dc.b $22,$CC,$88,$B3,$71,$8F,$1D,$80 .dc.b $0A,$87,$BD,$A1,$59,$23,$E9,$70 .dc.b $E2,$D3,$EC,$46,$68,$80,$42,$39 ; END.S END OF CODE NROM2: NOP .org $FFEE .ds.b 'GCC(C)1984' .org $FFF8 ; .dc.b $F0 ;CHECKSUM, MAKES EOR CHECKSUM ZERO .dc.b $2D ;CHECKSUM, MAKES EOR CHECKSUM ZERO .dc.b $F7 ;CART STARTS AT 0F000 - 7 JUST A FLAG .dc.w INTDLI ;INTERNAL GAME DLI HANDLER .dc.w MAIN .dc.w IRQINT